1. Field of the Invention
The present invention relates to a semiconductor manufacturing process, and more particularly, to a method for automatically controlling defect-specification in a semiconductor manufacturing process when performing detection on wafers and monitoring particles.
2. Description of the Prior Art
In a semiconductor manufacturing process, high accuracy is required for processing control, equipment operation, and raw material manufacturing. Any slight mistake in any of the processes leads to wafer failure. Therefore, the wafer needs to be detected during each processing stage. If a wafer fails to pass the detection, the reason for generating defects on the wafer is analyzed step by step to ensure the quality of the wafer product and to monitor the operation of equipment and modules on a production line effectively.
Please refer to FIG. 1, which is a flow chart of a prior art method for automatically controlling defect-specification. As shown in FIG. 1, a patterned wafer 60 is detected. Firstly, at least one wafer in a lot is sampled (step S101). When detecting physical defects of the sample wafer, a module is utilized to perform a bright field (BF) defect detection on the sample wafer (step S102) to detect if there are scratches or contamination on the surface of the physical wafer. If the preliminary result indicates that the physical wafer is abnormal, an engineer is informed to inspect the sample wafer by utilizing an optical microscope (OM) and to preliminarily classify the sample wafer according to the defects and the engineer""s experience (step S103). When detecting if there are particles adhered to the surface of the sample wafer, another module is utilized to perform a dark field (DF) defect detection on the sample wafer (step S104).
No matter how the detected sample wafer is classified, a defect management system is utilized to perform an analysis (step S105). If the spatial pattern on the surface of the sample wafer is regarded as acceptable, the defect management procedure for the sample wafer is ended. If the spatial pattern on the surface of the sample wafer is still regarded as abnormal, a scanning electron microscope (SEM) is utilized by an engineer to inspect the sample wafer first, and then the defect type on the sample wafer is empirically determined (step S106). If the sample wafer is regarded as acceptable after being inspected by the scanning electron microscope, it passes the detection.
However, the prior art method for wafer detection classifies the defect type according to an engineer""s personal experience, very easily leading to mistakes. For the defective wafers having special spatial patterns, the related staffs are not informed until the engineer makes an empirical judgment according to his personal experience. Since the related staffs are not informed to do a correction until the judgment is made, unexpected defect problems on the production line cannot be known in time. As a result, the throughputs of the module and the cycle time for products are affected. In addition, the inspecting engineer""s personal experience is difficult to transfer. It is thus difficult for new engineers to judge the defect type correctly when the original engineer resigns or is promoted. Furthermore, the prior art method for detecting the physical defects on the wafer utilizes an optical microscope to inspect the sample wafer and empirically classify the defects. As a result, the cost and man-hours are increased.
It is therefore very important to provide a method for automatically controlling defect-specification in the semiconductor manufacturing process to solve the above-mentioned problems.
It is a primary objective of the claimed invention to provide a method for automatically controlling defect-specification in a semiconductor manufacturing process to automatically classify the defects on a wafer, to reduce mistakes due to misjudgment, to shorten the standby time, and not to affect the throughputs of the module.
It is another primary objective of the claimed invention to provide a method for automatically controlling defect-specification in a semiconductor manufacturing process. Based on the special spatial patterns, possibly faulty equipment and a solution are automatically found to decrease the generation of defective wafers.
It is yet another primary objective of the claimed invention to provide a method for automatically controlling defect-specification in a semiconductor manufacturing process to effectively sample the defects on the wafer to increase the throughputs of the module and to shorten the cycle time for products.
The claimed invention method first samples at least one wafer from a batch of wafers. Then a module is utilized to detect the physical property of each sample wafer to detect a position, number, size, and intensity signals of defects on the sample wafer. The sample wafer is compared with a normal wafer to preliminarily classify the sample wafer according to the discrepancies of signals and create a defect map by utilizing the module. The defect map comprises a spatial pattern of defects on the sample wafer. Thereafter, a defect management system is utilized to analyze the preliminarily classified defect map to detect wafers having defects. A spatial pattern recognition procedure is executed by utilizing the defect management system to determine whether or not the defect map is recognized by a plurality of specific patterns stored in the defect management system. Each of the specific patterns corresponds to a defect type on the wafer and each defect type corresponds to at least a related operator, related equipment, and a related module. After searching for the specific pattern conforming to the defect map indicating the defect type on the sample wafer, the related operator, the related equipment, and the related module are ensured according to the specific pattern. Finally, messages are sent to an account of the related operator by the defect management system according to the defect type on the sample wafer so that the related equipment and the related module are tuned by the related operator according to the defect type on the wafer.
In addition, if the defect management system does not find the specific pattern conforming to the defect map, an optical microscope and a scanning electron microscope are utilized by the defect management system to inspect the sample wafer to finely classify the defects on the sample wafer. If the results of fine classification of the defects indicate that the sample wafer cannot pass the detection, messages are sent to an account of an analyst by the defect management system to ask the analyst to analyze the reason for the defects occurring on the sample wafer.
It is an advantage of the claimed invention that the objective and means of the claimed invention method are automatic. Therefore, the function is improved when applying the claimed invention method to the industry.
These and other objectives of the claimed invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.